Development of non-volatile memory devices which do not lose data even if supply of power is stopped is rapidly progressing. An example of such a non-volatile memory devices includes an EEPROM having a single poly structure, an EEPROM having a dual poly structure, a flash memory device having a stacked gate structure, a flash memory device having a separate gate structure, or a flash memory device having an SONOS structure.
Of fields of application of the non-volatile memory devices, an embedded flash memory device having a combined logic and memory can be fabricated by a process in which a floating gate and a control gate are formed in one chip at a time, has wide application and can be developed using existing equipment without requiring high technologies. In view of characteristics of the embedded flash memory device, profiles after etchings for forming gates are very important, such that a process for forming the profile of a selective gate which serves as a control gate is also one of important factors. This is because the selective gate is closely related with source/drain regions which are to be formed in a later process in fixing electric characteristics of the source/drain.
However, the embedded flash memory device has a problem in that it requires a very large thickness of a memory gate formed in a prior process for enlarging a cross-sectional area of the selective gate.